The localized oxidation of silicon (LOCOS) isolation method is widely used in many processes for manufacturing semiconductor integrated circuits. Using LOCOS, active silicon areas on the surface of a monocrystalline silicon substrate or silicon epitaxial layer can be electrically isolated by relatively thick insulating oxide regions. A patterned film of deposited silicon nitride (Si3N4) is used to selectively suppress oxide growth where active silicon is desired. Devices such as diodes, transistors, resistors, capacitors and other microelectronic structures are subsequently built in these active silicon regions between the insulating oxide regions. Such electrical isolation is essential to prevent unwanted electrical device to device interaction.
LOCOS processes start with deposition of an initial layer of silicon dioxide or other buffer layer to relieve stresses on the wafer surface. Nitride is then deposited on top of this oxide. The nitride is patterned using standard photolithography and etching techniques to define the LOCOS and active silicon areas. Oxide is thermally grown in the exposed areas, while the areas covered with nitride experience no oxide growth. Next, the masking nitride and oxide buffer layers are removed to expose the silicon active areas to further processing and ultimate device fabrication. The isolation oxide electrically isolates the adjacent devices.
Besides device isolation, the oxide is also used to mask ion implantation dopant introduction. The oxide blocks the implant from all areas but the exposed active silicon. Since the oxide also defines the active silicon regions, this masking is self aligned. This use is critical when active areas are so close together that photoresist can not be reliably patterned between them. If an implant falls on such adjacent active areas, the field oxide must reliably stop the implant so it will not short circuit or lower their breakdown voltage. When a LOCOS isolation scheme is used in a semiconductor process, the isolation oxide must be made thick enough to stop all expected implants.
As semiconductor device dimensions shrink in size and pitch, it becomes increasingly difficult to grow a thick and robust LOCOS oxide between closely spaced silicon regions. This is because the oxide thins as it approached the active silicon edge, forming the classic “bird's head” profile. Therefore, the full desired thickness may never be achieved if the active areas are so close that the opposing bird's heads intersect. Compounding this problem, after growth the field oxide is exposed to several subsequent processing steps that diminish its thickness, and further reduces its effectiveness as an ion implant blocking agent. These include the oxide etches associated with the oxide spacer formation and other processing steps. Their effect is shrinkage of all isolation oxide regions both laterally and vertically. The oxide between closely spaced active regions is affected proportionally more since it is thinner at the start.
This implant stopping problem with LOCOS is illustrated in FIG. 1. A substrate of monocrystalline silicon 8 has an epitaxial layer 7 that holds active silicon areas 100, 101, and 102. The active silicon regions 100, 101, and 102 are isolated by oxide regions 5 and 6. The gap between areas 100 and 101 is smaller than the gap between areas 100 and 102, and as a result the opposing bird's heads merge for isolation region 5. This makes the isolation oxide 5 thinner and narrower than the other isolation oxide 6. The active silicon areas 100, 101, and 102 are simultaneously doped by a locally unmasked ion implant 4. The implanted dopant ions 4 are supposed to be blocked outside of the active areas 100, 101, and 102 by the isolation oxides 5 and 6. During ion implantation the relatively thick field oxide 6 successfully masks dopant ions 4 from penetrating into the epitaxial layer 7. However, the thinner field oxide 5 fails to block the implant ions 4 from penetrating into layer 7. As a result, regions 100 and 101 are not well electrically isolated due to the implanted dopant resident beneath oxide 5.
There are other, more robust methods to integrate isolation oxide between active silicon regions, such as shallow or deep trench isolation where the trenches are etched and filled with oxide or other insulating material. But those trench techniques add further process steps and thus increase the cost of manufacture of integrated circuits. For this reason, the continued used of simple LOCOS isolation is desirable when possible.
Others have attempted one or more modifications to the conventional LOCOS process to preserve the thickness of the LOCOS oxide, especially in areas between closely spaced active areas. Examples of such techniques are found in one or more patents including and not limited to U.S. Pat. No. 5,686,346 (Duane), and U.S. Pat. No. 5,821,153 (Tsai et al.), U.S. Pat. No. 5,895,257 (Tsai et al.) and U.S. Pat. No. 6,054,368 (Yoo et al.). Those methods all require extra process steps which add protective edges to the LOCOS regions, rebuild the eroded field oxide, or make the field oxide less susceptible to subsequent erosion.